Von Neumann Architecture and Processors

Yesterday we starting taking a look at What is Von Neumann Architecture which is a great place to start if you’re new to all this.

Following on from this post, we’ll explore the characteristics of a processor (CPU) that is part of a computer designed using Von Neumann architecture.


The processor (or Central Processing Unit – CPU) of a computer is often thought of as the ‘brains’ of the computer. It decodes and processes and instruction and then retrieves (or fetches) the next one using the fetch-decode-execute cycle.

A processor contains registers and these are five particular registers that are used for processing in CPU’s based on Von Neumann architecture.


A register is high speed memory that is contained within the CPU. It’s not your RAM, your hard drive or your solid state drive. This type of memory lives inside the processor and stores data that is ready to be processed. There are different types of register and we’ll explore the five based on Von Neumann architecture in more detail below.

Program Counter

Processing instructions is great, but where do they come from? Step in, the program counter. Memory contains data and memory locations are assigned a unique address that identifies them. The program counter stores the memory address for the block of memory that contains the next instruction that the processor should fetch. This memory location is not referencing the type of memory described above for registers but is referencing a location in primary memory such as RAM (random access memory).

Memory Address Register (MAR)

Although the name is quite different, the memory address register shares similarities with the program counter. The main difference is that the MAR stores the memory address of the current instruction that is being processed. It may also contain the destination memory address for where data calculated by the processor is going to be transferred once the current instruction has been processed.

Memory Data Register (MDR)

The sibling of the MAR is the MDR. The memory data register stores the actual data (not an address!) found at the location pointed to by the MAR. If the MAR currently stores a destination memory address, where the processor will send calculated data after execution, the MDR stores this data temporarily before it is transferred to primary memory such as RAM.

Current Instruction Register (CIR)

The Current Instruction Register stores the current instruction that is being processed by the CPU. This works closely with the MAR (containing the address of the data related to the current instruction) and the MDR (which holds the actual data needed to execute the current instruction).

Looks messy! But keeping track of everything isn’t as simple as it seems!

Accumulator (ACC)

So, where does the data that is currently being calculated but isn’t yet finish stay? What happens if there’s a complicated formula with multiple steps being processed? There could be many intermediate results but where will these be stored? A common misconception is that these will be stored in the MDR but this is not the case! The MDR will only contain the final result ahead of transfer to primary memory. In steps the Accumulator! The calculator holds data that is being actively processed using the current instruction and any intermediate results of processing prior to the final result being calculated.


And there you have it. We know know what Von Neumann architecture is and in this article we’ve delved deeply into the constituent parts of a processor that are typical in computer design following Von Neumann architecture.

I mentioned above the fetch-decode-execute cycle which we’ll look at in more detail in a following post.

In the meantime, if you have any questions, leave them in the comments below!

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